JEDEC JESD8-2 PDF

JEDEC JESD8-2 PDF

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ADDENDUM No. 2 to JESD8 – STANDARD FOR OPERATING VOLTAGES AND INTERFACE LEVELS FOR LOW VOLTAGE EMITTER-COUPLED LOGIC (ECL) INTEGRATED CIRCUITS

Published by Publication Date Number of Pages
JEDEC 03/01/1993 9
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JEDEC JESD8-2 – ADDENDUM No. 2 to JESD8 – STANDARD FOR OPERATING VOLTAGES AND INTERFACE LEVELS FOR LOW VOLTAGE EMITTER-COUPLED LOGIC (ECL) INTEGRATED CIRCUITS

This Addendum No. 2 to JEDEC Standard No. 8 provides standard operating voltage and interface levels that can be used by designers and application engineers as they develop and introduce new products. Covers the ECL logic family designated 300K ECL. The 300K ECL family is Voltage and Temperature Compensated, with I/O interface levels compatible with the existing 100K ECL and 101K ECl families.

Product Details

Published:
03/01/1993
Number of Pages:
9
File Size:
1 file , 130 KB
Note:
This product is unavailable in Russia, Ukraine, Belarus

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