JEDEC JEB 15 PDF

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TERMINOLOGY AND METHODS OF MEASUREMENT FOR BISTABLE SEMICONDUCTOR MICROCIRCUITS

Published by Publication Date Number of Pages
JEDEC 11/01/1969 97
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JEDEC JEB 15 – TERMINOLOGY AND METHODS OF MEASUREMENT FOR BISTABLE SEMICONDUCTOR MICROCIRCUITS

This bulletin explains the terminology and methods of measurement for bistable semiconductor microcircuits. It is also intended to be used with the EIA Registration Data Format for semiconductor integrated bistable logic circuits.

Product Details

Published:
11/01/1969
Number of Pages:
97
File Size:
1 file
Note:
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