IEC 60821 Ed. 2.0 b PDF

Description

IEC 60821 Ed. 2.0 b – VMEbus – Microprocessor system bus for 1 byte to 4 byte data

Describes a high-performance backplane bus for use in microprocessor bases systems. This parallel bus supports single- and block-transfer cycles on a 32-bit non-multiplexed address and data highway. Transmission is governed by an asynchronous handshaken protocol. The bus allocation provides for multiprocessor architectures. This bus also supports inter-module interrupts for facilitating quick response to internal and external events. The mechanics of the boards and chassis are based on IEC 60297. Note: -1.This bus is similar to the VME bus. 2.For the price of this publication, please consult the ISO/IEC price-code list.

Product Details

Edition:

2.0

Published:

12/17/1991

Number of Pages:

561

Note:

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